
chain-stack:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400578 <_init>:
  400578:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40057c:	910003fd 	mov	x29, sp
  400580:	9400003e 	bl	400678 <call_weak_fn>
  400584:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400588:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400590 <.plt>:
  400590:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400594:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf530>
  400598:	f947fe11 	ldr	x17, [x16, #4088]
  40059c:	913fe210 	add	x16, x16, #0xff8
  4005a0:	d61f0220 	br	x17
  4005a4:	d503201f 	nop
  4005a8:	d503201f 	nop
  4005ac:	d503201f 	nop

00000000004005b0 <malloc@plt>:
  4005b0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005b4:	f9400211 	ldr	x17, [x16]
  4005b8:	91000210 	add	x16, x16, #0x0
  4005bc:	d61f0220 	br	x17

00000000004005c0 <__libc_start_main@plt>:
  4005c0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005c4:	f9400611 	ldr	x17, [x16, #8]
  4005c8:	91002210 	add	x16, x16, #0x8
  4005cc:	d61f0220 	br	x17

00000000004005d0 <__gmon_start__@plt>:
  4005d0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005d4:	f9400a11 	ldr	x17, [x16, #16]
  4005d8:	91004210 	add	x16, x16, #0x10
  4005dc:	d61f0220 	br	x17

00000000004005e0 <abort@plt>:
  4005e0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005e4:	f9400e11 	ldr	x17, [x16, #24]
  4005e8:	91006210 	add	x16, x16, #0x18
  4005ec:	d61f0220 	br	x17

00000000004005f0 <puts@plt>:
  4005f0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005f4:	f9401211 	ldr	x17, [x16, #32]
  4005f8:	91008210 	add	x16, x16, #0x20
  4005fc:	d61f0220 	br	x17

0000000000400600 <free@plt>:
  400600:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  400604:	f9401611 	ldr	x17, [x16, #40]
  400608:	9100a210 	add	x16, x16, #0x28
  40060c:	d61f0220 	br	x17

0000000000400610 <printf@plt>:
  400610:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  400614:	f9401a11 	ldr	x17, [x16, #48]
  400618:	9100c210 	add	x16, x16, #0x30
  40061c:	d61f0220 	br	x17

0000000000400620 <__assert_fail@plt>:
  400620:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  400624:	f9401e11 	ldr	x17, [x16, #56]
  400628:	9100e210 	add	x16, x16, #0x38
  40062c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400630 <_start>:
  400630:	d280001d 	mov	x29, #0x0                   	// #0
  400634:	d280001e 	mov	x30, #0x0                   	// #0
  400638:	aa0003e5 	mov	x5, x0
  40063c:	f94003e1 	ldr	x1, [sp]
  400640:	910023e2 	add	x2, sp, #0x8
  400644:	910003e6 	mov	x6, sp
  400648:	580000c0 	ldr	x0, 400660 <_start+0x30>
  40064c:	580000e3 	ldr	x3, 400668 <_start+0x38>
  400650:	58000104 	ldr	x4, 400670 <_start+0x40>
  400654:	97ffffdb 	bl	4005c0 <__libc_start_main@plt>
  400658:	97ffffe2 	bl	4005e0 <abort@plt>
  40065c:	00000000 	.inst	0x00000000 ; undefined
  400660:	00400928 	.word	0x00400928
  400664:	00000000 	.word	0x00000000
  400668:	004009a8 	.word	0x004009a8
  40066c:	00000000 	.word	0x00000000
  400670:	00400a28 	.word	0x00400a28
  400674:	00000000 	.word	0x00000000

0000000000400678 <call_weak_fn>:
  400678:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf530>
  40067c:	f947f000 	ldr	x0, [x0, #4064]
  400680:	b4000040 	cbz	x0, 400688 <call_weak_fn+0x10>
  400684:	17ffffd3 	b	4005d0 <__gmon_start__@plt>
  400688:	d65f03c0 	ret
  40068c:	00000000 	.inst	0x00000000 ; undefined

0000000000400690 <deregister_tm_clones>:
  400690:	b0000080 	adrp	x0, 411000 <malloc@GLIBC_2.17>
  400694:	91014000 	add	x0, x0, #0x50
  400698:	b0000081 	adrp	x1, 411000 <malloc@GLIBC_2.17>
  40069c:	91014021 	add	x1, x1, #0x50
  4006a0:	eb00003f 	cmp	x1, x0
  4006a4:	540000a0 	b.eq	4006b8 <deregister_tm_clones+0x28>  // b.none
  4006a8:	90000001 	adrp	x1, 400000 <_init-0x578>
  4006ac:	f9452421 	ldr	x1, [x1, #2632]
  4006b0:	b4000041 	cbz	x1, 4006b8 <deregister_tm_clones+0x28>
  4006b4:	d61f0020 	br	x1
  4006b8:	d65f03c0 	ret
  4006bc:	d503201f 	nop

00000000004006c0 <register_tm_clones>:
  4006c0:	b0000080 	adrp	x0, 411000 <malloc@GLIBC_2.17>
  4006c4:	91014000 	add	x0, x0, #0x50
  4006c8:	b0000081 	adrp	x1, 411000 <malloc@GLIBC_2.17>
  4006cc:	91014021 	add	x1, x1, #0x50
  4006d0:	cb000021 	sub	x1, x1, x0
  4006d4:	9343fc21 	asr	x1, x1, #3
  4006d8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4006dc:	9341fc21 	asr	x1, x1, #1
  4006e0:	b40000a1 	cbz	x1, 4006f4 <register_tm_clones+0x34>
  4006e4:	90000002 	adrp	x2, 400000 <_init-0x578>
  4006e8:	f9452842 	ldr	x2, [x2, #2640]
  4006ec:	b4000042 	cbz	x2, 4006f4 <register_tm_clones+0x34>
  4006f0:	d61f0040 	br	x2
  4006f4:	d65f03c0 	ret

00000000004006f8 <__do_global_dtors_aux>:
  4006f8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006fc:	910003fd 	mov	x29, sp
  400700:	f9000bf3 	str	x19, [sp, #16]
  400704:	b0000093 	adrp	x19, 411000 <malloc@GLIBC_2.17>
  400708:	39414260 	ldrb	w0, [x19, #80]
  40070c:	35000080 	cbnz	w0, 40071c <__do_global_dtors_aux+0x24>
  400710:	97ffffe0 	bl	400690 <deregister_tm_clones>
  400714:	52800020 	mov	w0, #0x1                   	// #1
  400718:	39014260 	strb	w0, [x19, #80]
  40071c:	f9400bf3 	ldr	x19, [sp, #16]
  400720:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400724:	d65f03c0 	ret

0000000000400728 <frame_dummy>:
  400728:	17ffffe6 	b	4006c0 <register_tm_clones>

000000000040072c <gettop>:
  40072c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400730:	910003fd 	mov	x29, sp
  400734:	f9000fa0 	str	x0, [x29, #24]
  400738:	f9400fa0 	ldr	x0, [x29, #24]
  40073c:	f9400000 	ldr	x0, [x0]
  400740:	f100001f 	cmp	x0, #0x0
  400744:	540000c1 	b.ne	40075c <gettop+0x30>  // b.any
  400748:	90000000 	adrp	x0, 400000 <_init-0x578>
  40074c:	91296000 	add	x0, x0, #0xa58
  400750:	97ffffa8 	bl	4005f0 <puts@plt>
  400754:	12800000 	mov	w0, #0xffffffff            	// #-1
  400758:	14000004 	b	400768 <gettop+0x3c>
  40075c:	f9400fa0 	ldr	x0, [x29, #24]
  400760:	f9400000 	ldr	x0, [x0]
  400764:	b9400000 	ldr	w0, [x0]
  400768:	a8c27bfd 	ldp	x29, x30, [sp], #32
  40076c:	d65f03c0 	ret

0000000000400770 <create>:
  400770:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400774:	910003fd 	mov	x29, sp
  400778:	d2800100 	mov	x0, #0x8                   	// #8
  40077c:	97ffff8d 	bl	4005b0 <malloc@plt>
  400780:	f9000fa0 	str	x0, [x29, #24]
  400784:	f9400fa0 	ldr	x0, [x29, #24]
  400788:	f900001f 	str	xzr, [x0]
  40078c:	f9400fa0 	ldr	x0, [x29, #24]
  400790:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400794:	d65f03c0 	ret

0000000000400798 <push>:
  400798:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  40079c:	910003fd 	mov	x29, sp
  4007a0:	f9000fa0 	str	x0, [x29, #24]
  4007a4:	b90017a1 	str	w1, [x29, #20]
  4007a8:	d2800200 	mov	x0, #0x10                  	// #16
  4007ac:	97ffff81 	bl	4005b0 <malloc@plt>
  4007b0:	f90017a0 	str	x0, [x29, #40]
  4007b4:	f94017a0 	ldr	x0, [x29, #40]
  4007b8:	f100001f 	cmp	x0, #0x0
  4007bc:	54000141 	b.ne	4007e4 <push+0x4c>  // b.any
  4007c0:	90000000 	adrp	x0, 400000 <_init-0x578>
  4007c4:	912b2002 	add	x2, x0, #0xac8
  4007c8:	90000000 	adrp	x0, 400000 <_init-0x578>
  4007cc:	9129c001 	add	x1, x0, #0xa70
  4007d0:	90000000 	adrp	x0, 400000 <_init-0x578>
  4007d4:	912a0000 	add	x0, x0, #0xa80
  4007d8:	aa0203e3 	mov	x3, x2
  4007dc:	52800522 	mov	w2, #0x29                  	// #41
  4007e0:	97ffff90 	bl	400620 <__assert_fail@plt>
  4007e4:	f94017a0 	ldr	x0, [x29, #40]
  4007e8:	b94017a1 	ldr	w1, [x29, #20]
  4007ec:	b9000001 	str	w1, [x0]
  4007f0:	f94017a0 	ldr	x0, [x29, #40]
  4007f4:	f900041f 	str	xzr, [x0, #8]
  4007f8:	f9400fa0 	ldr	x0, [x29, #24]
  4007fc:	f9400001 	ldr	x1, [x0]
  400800:	f94017a0 	ldr	x0, [x29, #40]
  400804:	f9000401 	str	x1, [x0, #8]
  400808:	f9400fa0 	ldr	x0, [x29, #24]
  40080c:	f94017a1 	ldr	x1, [x29, #40]
  400810:	f9000001 	str	x1, [x0]
  400814:	f9400fa0 	ldr	x0, [x29, #24]
  400818:	a8c37bfd 	ldp	x29, x30, [sp], #48
  40081c:	d65f03c0 	ret

0000000000400820 <pop>:
  400820:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400824:	910003fd 	mov	x29, sp
  400828:	f9000fa0 	str	x0, [x29, #24]
  40082c:	f9000ba1 	str	x1, [x29, #16]
  400830:	f9400fa0 	ldr	x0, [x29, #24]
  400834:	f9400000 	ldr	x0, [x0]
  400838:	f90017a0 	str	x0, [x29, #40]
  40083c:	f9400fa0 	ldr	x0, [x29, #24]
  400840:	f9400000 	ldr	x0, [x0]
  400844:	b9400001 	ldr	w1, [x0]
  400848:	f9400ba0 	ldr	x0, [x29, #16]
  40084c:	b9000001 	str	w1, [x0]
  400850:	f9400fa0 	ldr	x0, [x29, #24]
  400854:	f9400000 	ldr	x0, [x0]
  400858:	f9400401 	ldr	x1, [x0, #8]
  40085c:	f9400fa0 	ldr	x0, [x29, #24]
  400860:	f9000001 	str	x1, [x0]
  400864:	f94017a0 	ldr	x0, [x29, #40]
  400868:	97ffff66 	bl	400600 <free@plt>
  40086c:	f9400fa0 	ldr	x0, [x29, #24]
  400870:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400874:	d65f03c0 	ret

0000000000400878 <empty>:
  400878:	d10043ff 	sub	sp, sp, #0x10
  40087c:	f90007e0 	str	x0, [sp, #8]
  400880:	f94007e0 	ldr	x0, [sp, #8]
  400884:	f9400000 	ldr	x0, [x0]
  400888:	f100001f 	cmp	x0, #0x0
  40088c:	1a9f17e0 	cset	w0, eq  // eq = none
  400890:	12001c00 	and	w0, w0, #0xff
  400894:	910043ff 	add	sp, sp, #0x10
  400898:	d65f03c0 	ret

000000000040089c <display>:
  40089c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4008a0:	910003fd 	mov	x29, sp
  4008a4:	f9000fa0 	str	x0, [x29, #24]
  4008a8:	f9400fa0 	ldr	x0, [x29, #24]
  4008ac:	f9400000 	ldr	x0, [x0]
  4008b0:	f100001f 	cmp	x0, #0x0
  4008b4:	540000c1 	b.ne	4008cc <display+0x30>  // b.any
  4008b8:	90000000 	adrp	x0, 400000 <_init-0x578>
  4008bc:	912a4000 	add	x0, x0, #0xa90
  4008c0:	97ffff4c 	bl	4005f0 <puts@plt>
  4008c4:	52800000 	mov	w0, #0x0                   	// #0
  4008c8:	14000016 	b	400920 <display+0x84>
  4008cc:	f9400fa0 	ldr	x0, [x29, #24]
  4008d0:	f9400000 	ldr	x0, [x0]
  4008d4:	f90017a0 	str	x0, [x29, #40]
  4008d8:	90000000 	adrp	x0, 400000 <_init-0x578>
  4008dc:	912aa000 	add	x0, x0, #0xaa8
  4008e0:	97ffff4c 	bl	400610 <printf@plt>
  4008e4:	14000009 	b	400908 <display+0x6c>
  4008e8:	f94017a0 	ldr	x0, [x29, #40]
  4008ec:	b9400001 	ldr	w1, [x0]
  4008f0:	90000000 	adrp	x0, 400000 <_init-0x578>
  4008f4:	912ae000 	add	x0, x0, #0xab8
  4008f8:	97ffff46 	bl	400610 <printf@plt>
  4008fc:	f94017a0 	ldr	x0, [x29, #40]
  400900:	f9400400 	ldr	x0, [x0, #8]
  400904:	f90017a0 	str	x0, [x29, #40]
  400908:	f94017a0 	ldr	x0, [x29, #40]
  40090c:	f100001f 	cmp	x0, #0x0
  400910:	54fffec1 	b.ne	4008e8 <display+0x4c>  // b.any
  400914:	90000000 	adrp	x0, 400000 <_init-0x578>
  400918:	912b0000 	add	x0, x0, #0xac0
  40091c:	97ffff35 	bl	4005f0 <puts@plt>
  400920:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400924:	d65f03c0 	ret

0000000000400928 <main>:
  400928:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40092c:	910003fd 	mov	x29, sp
  400930:	97ffff90 	bl	400770 <create>
  400934:	f9000fa0 	str	x0, [x29, #24]
  400938:	52800021 	mov	w1, #0x1                   	// #1
  40093c:	f9400fa0 	ldr	x0, [x29, #24]
  400940:	97ffff96 	bl	400798 <push>
  400944:	f9000fa0 	str	x0, [x29, #24]
  400948:	52800041 	mov	w1, #0x2                   	// #2
  40094c:	f9400fa0 	ldr	x0, [x29, #24]
  400950:	97ffff92 	bl	400798 <push>
  400954:	f9000fa0 	str	x0, [x29, #24]
  400958:	52800061 	mov	w1, #0x3                   	// #3
  40095c:	f9400fa0 	ldr	x0, [x29, #24]
  400960:	97ffff8e 	bl	400798 <push>
  400964:	f9000fa0 	str	x0, [x29, #24]
  400968:	52800081 	mov	w1, #0x4                   	// #4
  40096c:	f9400fa0 	ldr	x0, [x29, #24]
  400970:	97ffff8a 	bl	400798 <push>
  400974:	f9000fa0 	str	x0, [x29, #24]
  400978:	f9400fa0 	ldr	x0, [x29, #24]
  40097c:	97ffffc8 	bl	40089c <display>
  400980:	910053a0 	add	x0, x29, #0x14
  400984:	aa0003e1 	mov	x1, x0
  400988:	f9400fa0 	ldr	x0, [x29, #24]
  40098c:	97ffffa5 	bl	400820 <pop>
  400990:	f9000fa0 	str	x0, [x29, #24]
  400994:	f9400fa0 	ldr	x0, [x29, #24]
  400998:	97ffffc1 	bl	40089c <display>
  40099c:	52800000 	mov	w0, #0x0                   	// #0
  4009a0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4009a4:	d65f03c0 	ret

00000000004009a8 <__libc_csu_init>:
  4009a8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4009ac:	910003fd 	mov	x29, sp
  4009b0:	a901d7f4 	stp	x20, x21, [sp, #24]
  4009b4:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf530>
  4009b8:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf530>
  4009bc:	91374294 	add	x20, x20, #0xdd0
  4009c0:	913722b5 	add	x21, x21, #0xdc8
  4009c4:	a902dff6 	stp	x22, x23, [sp, #40]
  4009c8:	cb150294 	sub	x20, x20, x21
  4009cc:	f9001ff8 	str	x24, [sp, #56]
  4009d0:	2a0003f6 	mov	w22, w0
  4009d4:	aa0103f7 	mov	x23, x1
  4009d8:	9343fe94 	asr	x20, x20, #3
  4009dc:	aa0203f8 	mov	x24, x2
  4009e0:	97fffee6 	bl	400578 <_init>
  4009e4:	b4000194 	cbz	x20, 400a14 <__libc_csu_init+0x6c>
  4009e8:	f9000bb3 	str	x19, [x29, #16]
  4009ec:	d2800013 	mov	x19, #0x0                   	// #0
  4009f0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4009f4:	aa1803e2 	mov	x2, x24
  4009f8:	aa1703e1 	mov	x1, x23
  4009fc:	2a1603e0 	mov	w0, w22
  400a00:	91000673 	add	x19, x19, #0x1
  400a04:	d63f0060 	blr	x3
  400a08:	eb13029f 	cmp	x20, x19
  400a0c:	54ffff21 	b.ne	4009f0 <__libc_csu_init+0x48>  // b.any
  400a10:	f9400bb3 	ldr	x19, [x29, #16]
  400a14:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400a18:	a942dff6 	ldp	x22, x23, [sp, #40]
  400a1c:	f9401ff8 	ldr	x24, [sp, #56]
  400a20:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400a24:	d65f03c0 	ret

0000000000400a28 <__libc_csu_fini>:
  400a28:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400a2c <_fini>:
  400a2c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a30:	910003fd 	mov	x29, sp
  400a34:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a38:	d65f03c0 	ret
